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Subject:
From:
David Gillett <[log in to unmask]>
Reply To:
PCBUILD - PC Hardware discussion List <[log in to unmask]>
Date:
Tue, 5 May 1998 11:23:56 -0800
Content-Type:
text/plain
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On  5 May 98 at 5:14, Bill Cohane wrote:

> Does anyone know exactly what the difference is between plain parity RAM
> and ECC RAM? Is it just that they call modern parity RAM (for example,
> SDRAM DIMMs) by the name ECC because that is what chipsets like the LX
> and BX can do with "parity" RAM?

  That's it exactly.  ECC is a function of the chipset; the extra bit
per byte is the feature of the RAM.

Notes:
1.  Four extra bits are not enough to do ECC across 32 data bits, so
with (single) 72-pin SIMMs the extras can only be used for parity or
ignored.  It's only when you get to DIMMs or *pairs* of SIMMs that
you have enough extra bits to do ECC.
2.  "Parity" has suffered a lot of mud-slinging, especially during
the period when you couldn't find EDO memory with it.  12.5% extra
bits translates into 10%-30% greater raw material and assembly costs;
ECC can be worth that kind of premium, parity isn't.

Russ Poffenberger writes:
> ECC RAM has enough extra bits to not only be able to detect single
> bit errors, but also correct them. Double bit errors are detected
> (but not corrected).

  ECC RAM has the same extra bits as parity RAM.
  The difference is that at 64 bits of data, you can do ECC in fewer
bits than parity -- at narrower widths, ECC would have required more
bits than were provided.
  This is why you do not see 30-pin and 72-pin parity SIMMs
advertised as "ECC".

> I guess I should have been clearer. The selection is not up to
> you. If your system was designed to use ECC memory, then you MUST
> use ECC memory. If not, then ECC memory will not work in your
> system.

  Every motherboard that I have used that supports ECC allows you, in
the CMOS setup, to turn this off.[Some also allow you to select
parity instead.]  DIMMs are keyed by voltage and type, but not by
whether they provide bits for ECC/Parity or not.

> As to performance, on systems that are designed to use ECC memory,
> all the detection and correction is done on the fly by specialized
> hardware, there is no performance penalty.

  Yes -- this was true of parity as well.

David G

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