At 21:24 07-03-98 -0800, Mark <[log in to unmask]> wrote:
>I have a PA 2007 revision 1.1 board with a  1.09cd12 bios. I am
>running a socket seven Intel 233MMX with two Samsung original 32 meg
>SDRAM DIMMS. OS is Win95b and things are very stable.
>However I can not enable a bios setting called CPU Pipeline in the Bios
>Chipset Features Setup. If I do enable it the PC will Post but will not
>boot.....I end up at Verifying DMI Pool Data and a flashing cursor.
>Does any one know what [CPU Pipeline] does and are there any issues with
>enabling it while running SDRAM.

Hi Mark

My manual describes the CPU Pipeline Function thusly:
"This allows the system controller to signal the CPU for a new memory
address, even before all data transfers for the current cycle are
complete, resulting in increased throughput. Enabled means that address
pipelining is active. The default is disabled."

Okay. You interpret from there.

Bill