PCBUILD Archives

Personal Computer Hardware discussion List

PCBUILD@LISTSERV.ICORS.ORG

Options: Use Forum View

Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Reply To:
PCBUILD - PC Hardware discussion List <[log in to unmask]>
Date:
Sun, 29 Mar 1998 06:02:17 +0200
Content-Type:
TEXT/PLAIN
Parts/Attachments:
TEXT/PLAIN (15 lines)
On Sat, 28 Mar 1998, Ron Taylor wrote:

> >L1 and L2 cache is normally set in CMOS under chipset or advanced
> >settings. Older motherboards will have jumper setting so check your
> >manual.
>
> No mention of L1 or L2 in the manual

Try the terms Internal SRAM cache, and external SRAM cache, (for L1 ad L2,
respectively), or any CMOS options that use the term SRAM.
Sometimes it appears as "CPU internal cache" and "external cache"
(respectively).

Uzi Paz

ATOM RSS1 RSS2