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Subject:
From:
Mark Rode <[log in to unmask]>
Reply To:
PCBUILD - PC Hardware discussion List <[log in to unmask]>
Date:
Sun, 8 Mar 1998 10:47:39 -0800
Content-Type:
text/plain
Parts/Attachments:
text/plain (38 lines)
There doesn't appear to be a connection between CPU pipeline and linear
burst mode.

From the manual>>>CPU Pipeline  When enabled, allows the CPU to execute the
pipeline function.

I am using an Intel chip and have linear burst mode disabled.

Mark


>> I have a PA 2007 revision 1.1 board with a  1.09cd12 bios. I am
>> running a socket seven  Intel 233MMX with two Samsung original 32 meg
>> SDRAM DIMMS. OS is Win95b and things are very stable.
>> However I can not enable a bios setting called CPU Pipeline in the Bios
>> Chipset Features
>> Setup. If I do enable it the PC will Post but will not  boot.....I end up
>> at Verifying DMI Pool Data and a flashing cursor.
>>
>> This is the first time I have seen this Bios setting in a board. I have not
>> noticed any performance issues but I'm curious..... Does any one know what
>> it does and are there any issues with enabling it while running SDRAM.
>
>Mark:
>
>This is very interesting since the default for this setting is Enabled.
What do
>you have for "Linear Burst Mode"? It should be disabled for Intel chips.
>Perhaps that's enabled and it's causing a conflict with the Pipeline setting?
>I'll be doing one of those boards tomorrow so I'll get back to you once I
look
>at the settings.
>
>Regards,
>
>Jose
>

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