On 24 Jul 99, at 21:08, Mary Elise Zimlich wrote:

> Can someone please tell me what "ECC SDRAM" is?  I know about the SDRAM
> part, but "ECC" is new to me.

  From the manufacturer's point of view, "ECC" and "Parity" are the same --
they provide an extra bit for each data byte.

  Parity, however, is a very simple check that can detect (but not correct)
single-bit errors and cannot detect double-bit errors.
  ECC is a more complicated method, which can *correct* single-bit errors and
detect double-bit errors.

  ECC uses the available extra bits across the whole width of a memory "row".
32 data bits would require 5 extra bits to do ECC, but a 72-pin SIMM with
parity provides only four extra bits.
  DIMMs are 64 bits wide; if they are made with parity, they provide 8 extra
bits per row.  ECC across 64 data bits requires only 6 extra bits -- so with
64-bit data buses (Pentium) and 64-bit-wide memory modules (DIMMs), ECC
becomes a possible option.

  It's pretty simple to calculate parity with a simple set of gates, in
parallel to regular memory access, and so with essentially *no* performance
impact.
  ECC is a bit more complicated, and its possible that its impact might be
measurable.  The extra depth of checking, and the ability to fix and ignore
simple errors, make it a good choice for systems where availability and
reliability are more important that a percentage point on performance --
i.e., servers.


David G

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