Sender: |
|
Date: |
Mon, 17 Jan 2000 23:09:02 -0800 |
Reply-To: |
|
Content-type: |
text/plain; charset=US-ASCII |
Subject: |
|
From: |
|
Content-transfer-encoding: |
7BIT |
In-Reply-To: |
<008e01bf6113$eaa46b20$65b388c1@VOYAGER> |
Organization: |
Deep Forest |
MIME-Version: |
1.0 |
Parts/Attachments: |
|
|
On 17 Jan 00, at 9:54, Carlos Cordeiro wrote:
> Can anyone explain me what is ecc RAM. Is it a parity bit ?
Yes, and no.
Yes, it's an extra bit per byte, used to detect memory errors.
No, it doesn't follow the "parity" rules to do the detection.
Parity is a very simple system that (a) can be cheaply done in
hardware without slowing down anything else, and (b) can detect
single-bit errors, but not double-bit errors, and cannot correct
errors.
ECC uses a much more complicated system, that has only become
practical now that RAM is typically accessed at least 64 bits at a
time. The ECC bits are claculated according to "Hamming code"; it
can not only detect double-bit errors, but actually *correct* single-
bit errors without stopping execution.
ECC stands for "Error-Correcting Code" (except on some
certification exams where it apparently stands for "Error Checking
and Correcting"). Because ECC may carry a slight performance
penalty, it's usually enabled only on servers.
David G
The PCBUILD web site always needs good submissions. If
you would like to contribute to the website, send any
hardware tech tips or hardware reviews to:
[log in to unmask]
|
|
|