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Tue, 5 May 1998 05:14:44 -0400 |
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At 13:53 04-05-98 +0000, Javier wrote:
>To single error correct 64 bits you need 7 bits, since the error
>may be also in the parity bits. I agree this is covered with 72 bits, but
>to be precise...
I knew that either you or David would catch me on this! I had changed the
paragraph in question to the following quote just previous to posting to
PCBUILD, but forgot to paste in the change. :)
"Although you have eight extra bits along with 64 data bits for every 72
bits, you only need 6 extra bits to uniquely specify a bit within each
64 (being that 2**6=64) allowing the other two bits to detect errors.
Since the location of the error is known and must be one of two values,
it can be corrected. (Actually seven bits would be more than enough to
specify any of the 72 bits, so the "extra" bits would also be error
protected. The last bit could be used to detect a multi bit error."
Does anyone know exactly what the difference is between plain parity RAM
and ECC RAM? Is it just that they call modern parity RAM (for example,
SDRAM DIMMs) by the name ECC because that is what chipsets like the LX
and BX can do with "parity" RAM?
I know that there are more exotic forms of ECC that have more extra bits
than does parity RAM (for even more error protection). But I am asking
about regular 72 bit wide DIMMs.
Regards,
Bill
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