At 09:56 PM 5/7/1998  Drew Dunn  wrote:
>
>Somebody please jump in here and correct me if I'm wrong, but I don't
>believe that it's the physical size of the cache that limits the amount of
>cacheable memory, but rather the number of bits that the TAG chip can
>address.  For instance, my Tyan Tomcat IVD motherboard has an HX chipset
>with 512K of cache, but it is capable of caching much more than 64MB of RAM.


I concur, and would further remark that CHIPSET support also
defines the capacity to cache more than 64MB of RAM. I do not
believe the VX and TX chipsets from Intel will permit the caching
of more than 64MB of RAM.

As for the LX and BX chipsets of the P-II, I do not know.

Regards,

John Chin