On 21 Jun 99, at 9:36, Roberto Safora wrote:

> "Would some one please put some light for me in " interrupt sharing"?
> Is it common for every PCI card that uses an IRQ?

  There are a couple of things that are needed in order for interrupt sharing
to work:

1. Level-triggered, rather than edge-triggered interrupt signalling.
  ISA only did edge-triggered signalling, meaning that an IRQ line had to
return to "unsignalled" after an interrupt before another interrupt could be
seen.  PCI supports level-triggered signalling, where another interrupt will
be seen immediately if some device is still holding the IRQ line "signalled".
  I think, though, that some BIOSes allow you to specify, in the CMOS
configuration, whether PCI interrupts should be edge- or level-triggered.

2. Interrupt-handler software that knows about the sharing devices.
  The "Interrupt Vector Table" tells the CPU what code gets control when a
given interrupt is signalled; traditionally, the interrupt-handling portion
of a device driver would take over the appropriate table entry.  If an IRQ is
being shared, the entry for that interrupt must point at code that either (a)
handles all of the devices that *could* be sharing that IRQ, or (b) can
figure out which of the sharing devices is signalling the IRQ, and transfer
control to the driver for that device, or (c) when installed, saved the
address of any previous handler for this IRQ, and will forward control to
that code if the device the driver is for is not the one signalling the IRQ.
It is possible that there are some PCI devices for which there is no DOS
(real mode) driver available that satisfies any of these requirements.

  Point 2 should also suggest that there may be a bit of a performance
penalty associated with sharing of IRQs.


David G

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