On  1 Jun 98 at 17:59, Drew Dunn wrote:

> A while back there was a discourse on how much memory a PII could cache.  I
> think that we agreed on up to 512K, which is correct.

  Er, 512M.  512K is the *size* of the cache an current models,
except for Celeron.

> I just read on a Linux hardware list that I subscribe to that Intel
> has overcome that limitation on the PII-350 and 400's.  The post
> said that they could cache any size main memory, which I take it to
> mean as much memory as a 32 bit architecture can address.

  Well, 32 bits gets you 4GB of physical address space, and I haven't
yet seen a production board that will mount more than 1GB of RAM,
tops.  This is in the ballpark of what the PPro does already, and
only 1-3 tag bits longer than was needed for 512MB.

David G