-----Original Message-----
From: Bill Cohane <[log in to unmask]>
Subject: Re: [PCBUILD] CPU Pipelining


>At 21:24 07-03-98 -0800, Mark <[log in to unmask]> wrote:
...
>>However I can not enable a bios setting called CPU Pipeline in the Bios
>>Chipset Features Setup. If I do enable it the PC will Post but will not
>>boot.....I end up at Verifying DMI Pool Data and a flashing cursor.
>>Does any one know what [CPU Pipeline] does and are there any issues with
>>enabling it while running SDRAM.
>

...
>
>My manual describes the CPU Pipeline Function thusly:
>"This allows the system controller to signal the CPU for a new memory
>address, even before all data transfers for the current cycle are
>complete, resulting in increased throughput. Enabled means that address
>pipelining is active. The default is disabled."
>
>
>Bill


I will venture a guess that 'enabled' permits the
cpu to perform a speculative fetch (typical of
risc chips) that will save time if it works, but
will lose time if a branch occurs.  Unfortunately,
this does not explain why the computer hangs.

Recently I made a post requesting a source of
information in addition to the bios survival guide.
Unfortunately, no one has responded.  I can see
that we are mucking around in the dark with the
newer bios.

Dean Kukral
Dept. of Mathematics and Statistics
Wichita State University
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