Hi.
>
> At 15:43 14-03-98 PST, David wrote:
> >Intermittantly the post memory chk will lock the system. Sometimes on
> >cold boot but more often on warm boot.
> >
> >This is the first time i have tried using edo memory so I'm not sure if
> >I am using wrong CMOS setting for EDO. I have Award BIOS. I usually use
> >non parity and set dram ECC/Parity to ECC. and Memory Parity/ECC check
> >to Auto. Or do I just have bad simms. I hate to spend more money on
> >simms to find out.
> >
> >Any suggestions?
>
>
>
> ECC stands for Error Checking and Correcting. Depending on the chipset
> and circuitry used on the motherboard, for ECC to be utilized, your
> memory must be either Parity RAM or ECC RAM. (Both of these types of
> RAM use 9 bits instead of 8 bits per byte. See below.)
>
        Excuse me if my suppositions are wrong, since I yet have to see
an ECC memory.
        ECC should use more that one aditional bit every eight. For ECC
to occur, on a 32 bit wide path, six aditional bits would be needed,
since 2^6=64, it can point to the bit in error within the 38 bits,
and include the no error case.
        See that reducing to five, 2^5=32 can't cover all cases.
        (2^p must be greater than n+p+1).
        32 bits -> 6 parity bits.
        64 bits -> 7 parity bits. It seems that here ECC is more efficient
than a parity bit per byte.
        Just thinking...
************************************
Javier Vizcaino. Ability Electronics. [log in to unmask]

Starting point:        (-1)^(-1) = -1
Applying logarithms: (-1)*ln(-1) = ln(-1)
Since ln(-1) <> 0, dividing:  -1 = 1
     (ln(-1) is complex, but exists)