> John Rinehart wrote
> And yet Scott Mueller's Upgrading and Repairing PC's states
> "You can install EDO memory in older systems that do not
> support it because EDO is backward-compatible . . .
> And Stephen Bigelow says, "EDO RAM can be used in non-EDO
> motherboards, but there will be no performance improvement."

> Earl Truss wrote
> I believe most Pentium systems will support the use of FPM
> SIMMs in addition to EDO . . .

> Adam Gonsman wrote
> . . . EDO is [not] backwardly compatible (the issue that
> started this whole thread) because my coworker's P75 won't
> accept them because it won't recognize EDO.
_________________________________________________________



EDO is a *subset* of FPM. Computer systems must be designed to
"take advantage" of EDO, principally in the memory controllers and
timing circuitry (collectively, the chipset). Most (I'd like to say "all")
chipsets for 486 and Pentiums support FPM. Chipsets may be able
to use EDO, even if not designed specifically for it, so long as the
subset is supported (or not "rejected").

Some older chipsets require parity RAM (EDO did not initially have
parity and EDO with parity is not the common variety). You cannot
mix parity RAM with nonparity unless you can turn off the parity
checking. So an older motherboard which requires parity cannot use
EDO. Some early Pentium motherboards required parity.

Intel's Triton series and later chipsets have the ability to use EDO RAM.
Some earlier Pentium chipsets made by other companies may not have
the capability to use EDO. The memory controller and timing may not
be able to accommodate EDO, even if they could accept non-parity
RAM.

In FPM, the memory controller must set up the addresses, receive
the data, and prepare for the next cycle. Fast Page Mode can decrease
cycle times by allowing the memory controller to access other data bits
which are in the same ROW address, saving time by not having to set
up the next row address instruction. Data accessed in the same row is
referred to as a "page".

EDO handles sequential reads better than FPM, but it is essentially
a variation of FPM with minor changes in Column Address Strobe
("CAS") and data output timing. EDO converts the normal sequential
FPM operation into a two-stage pipeline. A page address is presented
to the DRAM, and the data at that selected address is amplified and
latched at the data-output drivers. While the output buffers are driving
this data off-chip, the address decoder and path circuitry reset and
the system is able to initiate access to the next page address (FPM
doesn't do this).

Thus, EDO can present more data to the system because the memory
controller can begin a new COLUMN address instruction while it is
reading data at the current address. This increases performance
usually 10-15%.

If you are able to mix FPM and EDO, you must slow down the memory
timing to 5-3-3-3 or slower (EDO can use 5-2-2-2). This will help avoid
the timing errors that cause problems in Windows. Of course, you
operate at the speed of slowest RAM.

There is a more complicated explanation but I hope this helps.

Also, there are other incompatibilities among RAM types, within the
FPM and EDO categories themselves. Some motherboards don't like
mixing double-sided SIMMs with single-sided, true parity with logic
parity, cannot use 8MB SIMMs (or see them as 4MB), even differing
brands or SIMM circuitry layouts (which can lead to memory skew,
where the data do not output from the differing SIMMs simultaneously).

I always try to match the SIMMs, in every aspect, on my motherboards
as best as I can; otherwise, I replace the SIMMs with matched sets.

Regards,

John Chin