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On 1 Feb 99, at 8:13, David Nasser wrote:
> In general, risc processors require _more_ instruction cycles
> (because the instructions, on average, are more fundamental) to run
> an application, but execute the individual instructions more quickly.
> They are sometimes referred to as "load and store" computers because
> of their instruction's relative (to cisc) simplicity.
On some CISC architectures, there are single complex instructions
that will change the contents of a specified memory location in
specified ways. On RISC CPUs, this almost always corresponds to at
least 3 instructions:
LOAD (mem location -> register)
<modify value in register>
STORE (register -> mem location)
A CISC machine often has some kinds of value modification that can be
done without the separate LOAD and STORE instructions.
And the use of a register. Because of this consideration, RISC CPUs
tend to provide many more general-purpose registers than CISC CPUs do.
David G
PCBUILD's List Owner's:
Bob Wright<[log in to unmask]>
Drew Dunn<[log in to unmask]>
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