PCBUILD Archives

Personal Computer Hardware discussion List

PCBUILD@LISTSERV.ICORS.ORG

Options: Use Forum View

Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
David Gillett <[log in to unmask]>
Reply To:
PCBUILD - Personal Computer Hardware discussion List <[log in to unmask]>
Date:
Fri, 11 Sep 1998 17:59:07 -0800
Content-Type:
text/plain
Parts/Attachments:
text/plain (36 lines)
On 11 Sep 98 at 19:57, Bill Cohane wrote:

> At 10:36 AM 9/11/98 -0800, I (David Gillett) wrote:
> > On 10 Sep 98 at 21:29, Bill Cohane wrote:
> > > At 10:18 AM 9/10/98 -0800, I (David Gillett) wrote:
> > > > > 3. Enable TI-SCTR/WDTR (60,80pin)
> > > >   I believe this is setting whether termination of this device
> > > > applies only to the wide (68-pin) connection, or the SCA (80-pin)
> > > > connector.
> > >
> > > Concerning "Enable TI-SCTR/WDTR", the documentation for the DDRS
> > > hard drive says:
> > >
> > > "When the jumper is installed the drive will initiate synchronous data
> > > transfer speed negotiation (50,68 & 80 pin) and initiate wide data
> > > transfer request (68 & 80 pin) following a SCSI bus reset or power
> > > on event."
> >
> >   Thanks -- that makes more sense.  Synchronous and wide are both
> > good things, so this should be enabled, right?
>
> Definitely. Do you want to post this to the list or send it to the
> person who started the thread? Your comments about the other jumper
> settings were more down to earth than mine were.

  Bill has graciously clarified this item for me in private email,
but anyone who read/saved my list message should note this
correction.

David G

                                  -----
       **Need help with PCBUILD mailing list? Send an Email to:**
        Bob Wright<[log in to unmask]> or Drew Dunn<[log in to unmask]>


ATOM RSS1 RSS2