At 09:16 13-07-98 -0400, James Kerr wrote:
>I was under the impression that [the Pentium II processor] could
>cache up to 512MB although they are building systems with a lot
>more RAM then that...I don't think that it would be able to cache
>an unlimited amount of RAM.

The original Pentium II processors (233 MHZ, 266 MHZ, 300 MHZ, AND
333 MHZ) could cache up to 512 MB of addressable memory.

The Pentium II 350 MHz and 400 MHZ Processors can cache the full
4 GB of addressable memory space. See the new Pentium II data sheet
<ftp://download.intel.com/design/PentiumII/datashts/24365701.pdf>.

Like the Pentium and Pentium Pro, the Pentium II can address up to
4 GB of physical Memory (and can address up to 4 TB of virtual
memory, a TB being 1024 GB).

   Actually, the amount of RAM addressable by the Pentium Pro and
   Pentium II can be 64 GB. By paging the physical RAM and enabling
   the PAE flag (in control register CR4, bit 5), 4 additional
   address lines are enabled. This allows for 36-bit physical
   addresses, not just the 32-bit addressing which gives 4 GB.
   (2**32 Bytes = 4 GBytes whereas 2**36 Bytes = 64 GBytes.)

The amount of addressable memory that can be cached depends
on the size of the TagRAM, not the total amount of cache memory.
(L2 is composed of the TagRAM and the burst pipeline synchronous
static RAM (BSRAM) memories.) The TagRAM holds the memory addresses
whereas the rest of the L2 memory holds the data that's at those
addresses. More TagRAM, more addresses to pick from. (Hence more
"RAM cachable".) Increasing the L2 from 512 KB to 1 MB, say,
"doubles the depth of the cache lines" but does not change the
Tag size. It lets you store the data that's at more of the
addresses at any moment, but does not affect the maximum number
of addresses that can be chosen from.

Summary: The PIIs 233 MHZ through 333 MHZ can cache 512 MB of
addressable RAM, whereas PIIs 350 MHZ and up can cache the full
4 GB of addressable RAM (and even the full 64 GB physical address
space).

Regards,
Bill