Hi Phil,

This is a subject I can probably answer just about any question you 
might have. At work, I am responsible for helping design a system that 
uses the PCIe bus extensively. We have to deal with multiple lane widths 
(x4 - x16) and Rev 1.x as well as 2.0. I have been through most of the 
PCI-SIG specs on a very detailed level.

To answer your question, PCIe 1.x and 2.0 systems are supposed to be 
fully compatible with each other. One of the most basic goals put 
forward from the PCIe group within the PCI-SIG was that the two standars 
be fully inter-operable. As such, all aspects of the system, including 
electrical (physical layer), data transport (data link layer) and high 
level protocols (transaction layer) were designed so that they can 
detect which type of system they are installed on and adjust 
accordingly. Thus a PCIe 1.x card will operate in a 2.0 slot, and 2.0 
cards will operate in 1.x slots. The protocol involves that the links go 
through a "training" sequence upon hard reset to detect which one they 
will both operate at. Extended features in the protocol are negotiated 
via capabilities that are advertised by the devices. The only difference 
with a 2.0 card in a 1.0 slot is that its maximum bandwidth is cut in 
half. (1.0 supports 2.5GT/s per lane while 2.0 runs at 5.0 GT/s per lane).

It is also OK to put a smaller lane device in a larger slot, ie an x1, 
x4, or x8 card in an x16 slot. However a larger lane card will not 
physically fit in a smaller lane slot, although the protocol technically 
supports it as the usable lanes is also negotiated. This is why quite 
often you might see motherboard that lists a slot as being x4 in an x8 
slot, meaning only 4 lanes are wired but physically the slot will 
accommodate an x8 card. You might also find x8 lanes in an x16 slot. 
This is useful to support PCIe video cards which pretty much come only 
in an x16 form factor, but the motherboard chipset does not have enough 
lanes to be able to wire all 16.

BTW, the PCI-SIG is pretty far along in solidifying the 3.0 spec which 
will double the bandwidth yet again from the 2.0 spec.

Russ Poffenberger
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On 2/26/2010 8:23 AM, Phillip Williams wrote:
> My latest build I'm working on uses an ECS G31T-M mobo which has a pci-e x1
> slot (revision 1.1) and a smaller pci-e1(rev. 1.0a). I'm not sure what
> the smaller slot is for but my real question is, will a pci-e 2.0 card
> work at it's optimum on this board? The ecs site says it takes a x16
> card but when shopping online, cards are listed as pci-e or pci-e 2.0.
>   I figure it will be fine but thought it would be wise to check with
> you guys (and gals)
> about compatibility issues.
>
> Thanks,
> -Phil Williams-
>    

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